FPGA is getting a lot of attention from electronics/embedded developers and system developers. Since the invention of FPGA in 1984 by Xilinx the popularity and the market of FPGA has seen an upward trend. The market that was around 3 billion USD is expected to grow to 8 billion USD in 2022. FPGA is popular because they are field programmable meaning they can be reconfigured to give custom hardware functionalities. This feature gives FPGA a tremendous edge over ever popular Application Specific ICs (ASICs) in many applications (all our microcontroller, microprocessors, DSP processors are ASIC). Keeping a pace with the industry trends we at Chitkara University have embraced FPGA technology. Last year in 2016 on March 17-18 we conducted a two-day workshop on FPGA, I had written an article after that in which I had given an overview of FPGA architecture and comparison between FPGA and ASIC. You can access that article in the Archives section (on the right hand side).

Very recently on Feb 17-18, Department of ECE, Chitkara University H.P. conducted a two day faculty development program on Digital Design on FPGA using Xilinx. The program was attended by around 30 faculty and research scholars fom five different engineering institutions. The resource person for the program was Mr. Vaibhav Mishra from Tech Adityaa Ghaziabad. Vaibhav is having 10 years hands-on industry experience on various Xilinx platforms. For hands-on exercises we used Xilinx ISE and Vivado Design Suites. We implemented our design on Nexys 4 FPGA kit from Digilent featuring Artix 7 FPGA chip from Xilinx.

The program started with introduction to FPGA and its architecture, comparison with ASIC and its applications. Then we discussed FPGA design flow in complete details. Introduction to Xilinx ISE followed next, we implemented several combinational circuits using schematic entry on Xilinx ISE. We stared with half adder, full adder, and two bit adder with CLEAR etc. After doing the simulation we implemented the design on Artix 7 Nexys board. On day two of the program we got introduced to Vivado Design Suite. We built various sequential circuits using VHDL/Verilog on Vivado and carried out the simulations. The program ended in a valedictory that was attended by Dr. Varinder S Kanwar, Registrar Chitkara University H.P. He gave away the certificates to the participants.

It was a good learning experience and a good kick-start on FPGA for the participants who shared their feedback with the audience during the valedictory. Thanks are due to Vaibhav Mishra for conducting the sessions during the workshop and Lipika Gupta, HoD, Department of ECE for organizing this FDP in the department.

- By Sagar Juneja (Coordinator of the FDP), Research Associate, Chitkara University H.P.