Increasing demand for new & more advanced electronic products with smaller form factor, improved functionalities, better performance and lower overall cost has driven the semiconductor industry to develop more innovative IC manufacturing technologies. Today the capabilities & processing power of electronics devices are increasing many folds and yet designers are trying very hard to achieve lower power consumption, smaller form factor and reduced cost. These days we often comes across marketing commercials of smart phones claiming they are slimmer and less power hungry than their predecessors and yet offer more functionalities & better performance at a very competitive price

Ever wonder what revolution is happening at the chip level of these devices to make them smarter day by day?

We are quite familiar with Systems-on-chip (SoCs) which pack an incredible amount of functionality onto a single silicon die. SoCs typically include a processor, digital logic, memory, and analog components, along with embedded software. But in this article we are taking about the new IC manufacturing technology - 3D ICs with through-silicon vias (TSVs).

“Three dimensional integrated circuit” (3D IC) is an integrated circuit manufactured by stacking silicon wafers and/or dies and interconnecting them vertically using through-silicon vias (TSVs) so that they behave as a single device to achieve performance improvements at reduced power and smaller footprint than conventional two dimensional processes. 3D ICs promise “more than Moore” integration by packing a great deal of functionality into small form factors, while improving performance and reducing costs. 3D IC packages may accommodate multiple heterogeneous die—such as logic, memory, analog, RF, and micro-electrical mechanical systems (MEMS)—at different process nodes, such as 28nm for high-speed logic and 130nm for analog.

Demand for Through Silicon Vias (TSV) is been driven by the need for 3D stacking to shorten interconnection length, increase signal speed, reduce power consumption & dissipation when compared to 2D packaging. There is a growing interest in the development and application of this new chip manufacturing approach to existing and future devices.

3D IC Design [Source EE Times]

As functional integration requirements increase, assembly and wafer fabrication companies are looking toward 3D TSV technology, which allows stacking of LSIs thereby enabling products to be made smaller with more functionalities. 3D technology realizes miniaturization by 300-400% compared to conventional packaging.

3D integrated circuits (ICs) with through-silicon vias (TSVs) offer new levels of efficiency, power, performance, and form-factor advantages to the semiconductor industry. 3D ICs with TSVs are expected to have a broad impact in areas such as networking, graphics, mobile communications, and computing, especially for applications that require ultra-light, small, low-power devices. Specific application areas include multi-core CPUs, GPUs, packet buffers/routers, smart phones, tablets, netbooks, cameras, DVD players, and set-top boxes.

By Sagar Juneja – Research Associate &
Ayush Garg – final year ECE student,
Chitkara University, Himachal Pradesh

References
https://en.wikipedia.org/wiki/Three-dimensional_integrated_circuit
https://www.cadence.com/rl/resources/white_papers/3dic_wp.pdf